Event Details

Verifiable Compilation to Accelerators Using a Formal Software/Hardware Interface and Flexible Matching

Date: 12/16/2021 2:46 pm
Lightning Talks

Organization: University of Washington
Speakers: Gus Smith

It has been challenging to extend compiler support for various custom accelerators due to the lack of a common interface for invoking the devices from various DSLs as well as the granularity mismatch between coarse-grained accelerator operations and finer-grained compiler intrinsics. We propose mitigating this impedance mismatch by using the Instruction-Level Abstraction (ILA) as the software/hardware interface for accelerators. The ILA provides a formal specification of the accelerator, which can be verified against the RTL implementation, and presents a uniform processor/accelerator target interface for compilers. We implement a prototype of this approach using the BYOC framework and additionally extend its pattern-matching capabilities with flexible matching by applying a term-rewriting system to potentially discover more matches between the input program and target accelerator patterns. The flexible matching step further automates the process of adding accelerator support into TVM.

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